Code Generation

Generate optimized C, C++, CUDA, Verilog, or VHDL that complies with standards

With the code generation capabilities from MathWorks^® products, you can generate code from MATLAB^® code or Simulink^® models. Instead of writing thousands of lines of code by hand, you can increase your productivity and improve the quality of your code. You can generate code for use in applications such as signal processing, industrial controls, embedded vision, and deep learning. Generate C, C++, CUDA^®, Verilog^®, VHDL^®, and PLC code or generate code for middleware architecture and standards such as AUTOSAR or DDS. To qualify your code for certification, verify it against standards such as ISO26262 and DO-178C.

Products for Code Generation

MATLAB Coder

Generate C and C++ code from MATLAB code

Embedded Coder

Generate C and C++ code optimized for embedded systems

HDL Coder

Generate Verilog, SystemVerilog, and VHDL code for FPGA and ASIC designs

HDL Verifier

Test and verify Verilog and VHDL using HDL simulators and FPGA boards

Filter Design HDL Coder

Generate HDL code for fixed-point filters

Fixed-Point Designer

Model and optimize fixed-point and floating-point algorithms

GPU Coder

Generate CUDA code for NVIDIA GPUs

Simulink Coder

Generate C and C++ code from Simulink and Stateflow models

DDS Blockset

Design and simulate DDS applications

AUTOSAR Blockset

Design and simulate AUTOSAR software

C2000 Microcontroller Blockset

Design, simulate, and implement applications for Texas Instruments C2000 microcontrollers

Simulink PLC Coder

Generate IEC 61131-3 Structured Text and Ladder Diagrams for PLCs and PACs

Simulink Code Inspector

Automate and manage source code reviews for safety standards

DO Qualification Kit

Qualify Simulink and Polyspace verification tools for DO-178, DO-278, and DO-254

IEC Certification Kit

Qualify software tools for ISO 26262 and IEC 61508 certification

Topics

C/C++ Code Generation

Code Generation by Using Embedded Coder (Embedded Coder)
MathWorks code generation technology produces C or C++ code and executable programs for algorithms.
Deploy Algorithm Model for Real-Time Rapid Prototyping (Simulink Coder)
Deploy algorithm model for testing in real time.
Generate C Code by Using the MATLAB Coder App (MATLAB Coder)
Use the MATLAB Coder™ app to generate C code from an example MATLAB function.

HDL Code Generation

Generate Code and Synthesize on FPGA Using HDL Workflow Advisor (HDL Coder)
The HDL Workflow Advisor guides you through the stages of generating HDL code for a Simulink subsystem and the FPGA design process, such as:
Basic HDL Code Generation and FPGA Synthesis from MATLAB (HDL Coder)
This example shows how to create a HDL Coder™ project, generate code for your MATLAB® design, and synthesize the HDL code.
Verify HDL Design Using SystemVerilog DPI Test Bench (HDL Coder)
This example shows how to use SystemVerilog DPI test bench for verification of HDL code where a large data set is required.

GPU Code Generation

Code Generation by Using the GPU Coder App (GPU Coder)
Generate CUDA code from MATLAB code by using the GPU Coder™ app.
Code Generation from Simulink Models with GPU Coder (GPU Coder)
Generate CUDA code from Simulink models by using GPU Coder.
Code Generation for Deep Learning Networks (GPU Coder)
Get started with CUDA code generation for image classification networks such as ResNet.

PLC Code Generation

Generating Ladder Diagram Code from Simulink (Simulink PLC Coder)
Generate Ladder Diagram code (L5X) from Simulink.
Generate Structured Text Code for a Simple Simulink Subsystem (Simulink PLC Coder)
This example shows how to select the target IDE for a Simulink® model, generate IEC 61131-10 code, and view generated files.
Model, Simulate, and Generate Code for Ladder Logic-Based Elevator Controller (Simulink PLC Coder)
Rapidly prototype the ladder logic-based controller for a single car elevator by using Simulink® PLC Coder™ to model and simulate the ladder logic.

Code Generation for Middleware Architectures

Generate AUTOSAR C Code and XML Descriptions (AUTOSAR Blockset)
Generate AUTOSAR-compliant C code and export AUTOSAR XML (ARXML) descriptions from AUTOSAR component model.
Generate AUTOSAR Adaptive C++ Code and XML Descriptions (AUTOSAR Blockset)
Generate AUTOSAR-compliant C++ code and export AUTOSAR XML (ARXML) descriptions from AUTOSAR adaptive component model.
DDS Blockset Shapes Demo (DDS Blockset)
DDS Blockset implementation of Shapes Demo.

Certification and Standards

Highway Lane Following: A Model-Based Design Example for ISO 26262:2018 (IEC Certification Kit)
Demonstrates the use of Simulink to apply a Model-Based Design workflow to an ISO 26262 ASIL D project.
Helicopter Flight Control: A Model-Based Design Example for DO-178C and DO-331 (DO Qualification Kit)
Demonstrates the use of the DO-178C project template in a helicopter flight control project.

Featured Examples

Code Generation for Deep Learning Simulink Model That Performs Lane and Vehicle Detection

This example shows how to generate C++ code from a Simulink® model that performs lane and vehicle detection using convolutional neural networks (CNN).

Smile Detection by Using OpenCV Code in Simulink

Build a smile detector by using the OpenCV Importer app. The detector estimates the intensity of the smile on a face image or a video. Based on the estimated intensity, the detector identifies an appropriate emoji from its database, and then places the emoji on the smiling face.

Classify Images on FPGA by Using Quantized GoogLeNet Network

Show how to use the Deep Learning HDL Toolbox™ to deploy a quantized GoogleNet network to classify an image. The example uses the pretrained GoogLeNet network to demonstrate transfer learning, quantization, and deployment for the quantized network. Quantization helps reduce the memory requirement of a deep neural network by quantizing weights, biases and activations of network layers to 8-bit scaled integer data types. Use MATLAB® to retrieve the prediction results.

Edge Detection and Image Overlay

Detect and highlight object edges in a video stream. The behavior of the pixel-stream Sobel Edge Detector block, video stream alignment, and overlay, is verified by comparing the results with the same algorithm calculated by the full-frame blocks from the Computer Vision Toolbox™.

CUDA Code from CWT

Learn how to generate CUDA Code for the CWT.

Field-Oriented Control of PMSM with Quadrature Encoder Using C2000 Processors

Implements the field-oriented control (FOC) technique to control the speed of a three-phase permanent magnet synchronous motor (PMSM). The FOC algorithm requires rotor position feedback, which is obtained by a quadrature encoder sensor. For details about FOC, see Field-Oriented Control (FOC) (Motor Control Blockset).